{"id":76,"date":"2025-03-21T19:22:12","date_gmt":"2025-03-21T11:22:12","guid":{"rendered":"https:\/\/zoneofee.cn\/?p=76"},"modified":"2025-03-22T23:20:30","modified_gmt":"2025-03-22T15:20:30","slug":"nvdla%e7%bb%bc%e5%90%88","status":"publish","type":"post","link":"https:\/\/zoneofee.cn\/index.php\/2025\/03\/21\/nvdla%e7%bb%bc%e5%90%88\/","title":{"rendered":"NVDLA\u7efc\u5408"},"content":{"rendered":"\n
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\u4f7f\u7528TSMC28\u5de5\u827a\u5e93\u5b9e\u73b0\uff0c\u5168\u90e8\u8d44\u6599\u6765\u6e90\u4e8e\u516c\u5f00\u7f51\u7edc\uff0c\u4ec5\u4f9b\u5b66\u4e60\u4ea4\u6d41\uff0c\u4fb5\u6743\u8bf7\u8054\u7cfb\u5220\u9664\u3002<\/p>\n<\/blockquote>\n\n\n\n

RTL\u4ee3\u7801\u751f\u6210<\/h2>\n\n\n\n

NVDLA\u4ed3\u5e93clone\u4e0b\u6765\u4e4b\u540echeckout\u5230nv_small\u5206\u652f\uff0c\u6267\u884cmake\uff1a<\/p>\n\n\n\n

git checkout nv_small\nmake<\/code><\/pre>\n\n\n\n
\u6309\u63d0\u793a\u914d\u7f6e\uff0c\u751f\u6210\u7684tree.make\u5982\u4e0b\uff1a<\/p>\n\n\n\n
##======================= \t\t\t\t\t\t\t\t\t\t  \n## Project Name Setup, multiple projects supported\t\t\t  \t  \n##======================= \t\t\t\t\t\t\t\t\t\t  \nPROJECTS := nv_small\n  \t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t  \n##======================= \t\t\t\t\t\t\t\t\t\t  \n##Linux Environment Setup \t\t\t\t\t\t\t\t\t\t  \n##======================= \t\t\t\t\t\t\t\t\t\t  \n  \t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t  \nUSE_DESIGNWARE  := 1\nDESIGNWARE_DIR  := \/iccad\/synopsys\/syn\/U-2022.12-SP1\/dw\/sim_ver\nCPP  := \/usr\/bin\/cpp\nGCC  := \/usr\/bin\/gcc\nCXX  := \/usr\/bin\/g++\nPERL := \/usr\/bin\/perl\nJAVA := \/usr\/bin\/java\nSYSTEMC := \/usr\/local\/systemc-2.3.4\nPYTHON := \/usr\/bin\/python3.6\nVCS_HOME := \/iccad\/synopsys\/vcs\/T-2022.06\nNOVAS_HOME := \/iccad\/synopsys\/verdi\/T-2022.06\nVERDI_HOME := \/iccad\/synopsys\/verdi\/T-2022.06\nVERILATOR := verilator\nCLANG := \/home\/utils\/llvm-4.0.1\/bin\/clang<\/code><\/pre>\n\n\n\n
\u8fd0\u884ctmake\u751f\u6210RTL<\/p>\n\n\n\n
.\/tools\/bin\/tmake -build vmod<\/code><\/pre>\n\n\n\n
\u53ef\u80fd\u4f1a\u63d0\u793aperl\u7684\u6a21\u5757\u6ca1\u6709\u5b89\u88c5\uff0c\u6309\u63d0\u793a\u4f7f\u7528CPAN\u5b89\u88c5\u5373\u53ef\u3002<\/p>\n\n\n\n
SRAM\u66ff\u6362<\/h2>\n\n\n\n
\u5728hw\/outdir\/nv_small\/vmod\/rams\/synth\/<\/code>\u76ee\u5f55\u4e0b\u53ef\u4ee5\u627e\u5230\u6240\u9700\u7684sram\uff0c\u53ef\u4ee5\u770b\u5230\u5168\u90e8\u53ea\u4f7f\u7528\u4e86\u4e00\u4e2aclock port\uff0c\u5373\u90fd\u662fpseudo dual port sram\u3002<\/p>\n\n\n\n
nvdla\u7684\u5728sram\u5916\u9762\u5957\u4e86\u4e24\u5c42\u58f3\uff0c\u4ee5nv_ram_rwsp_20x289.v\u4e3a\u4f8b\uff0c\u8fd9\u662f\u6700\u5916\u5c42\u7684\u58f3\uff0c\u5305\u542b\u4e00\u4e9bmbsit\u76f8\u5173\u7684\u903b\u8f91\uff0c\u5176\u4e2d\u4f8b\u5316nv_ram_rwsp_20x289_logic.v\uff0c\u8fd9\u4e00\u5c42\u4e3b\u8981\u5305\u542b\u7269\u7406sram\u7684\u62fc\u63a5\u903b\u8f91\uff0c\u4f8b\u5982\u7269\u7406sram\u53ea\u652f\u6301288\u7684width\uff0c\u5c31\u4f1a\u5728nv_ram_rwsp_20x289_logic\u8fd9\u4e00\u5c42\u4f8b\u531620\u4e2areg\uff0c\u4ee3\u66ff\u7f3a\u5931\u76841bit\u3002<\/p>\n\n\n\n
\u800c\u5b9e\u9645\u4f8b\u5316\u7684\u7269\u7406sram\u5728hw\/outdir\/nv_small\/vmod\/rams\/model\/<\/code>\u76ee\u5f55\u4e0b\u53ef\u4ee5\u627e\u5230\uff0c\u53ef\u80fd\u662fsram ip\u5bf9\u4e8esize\u6709\u9650\u5236\uff0c\u867d\u7136nvdla\u6240\u6709\u7684ram wrapper\u90fd\u53ea\u4f7f\u7528\u4e86\u4e00\u4e2aclk port\uff08pesuado dual port sram\uff09\uff0c\u4f46\u5374\u4f8b\u5316\u4e86\u4e00\u4e9bdual port sram\u3002<\/p>\n\n\n\n
\u8003\u8651\u5230\u540e\u7eed\u6d41\u7a0b\u7528\u4e0d\u5230\u8fd9\u4e9bmbist\u903b\u8f91\uff0c\u5e76\u4e14\u8ddf\u5b98\u65b9\u4f7f\u7528\u7684\u5de5\u827a\u5e93\u7684size\u914d\u7f6e\u4e0d\u540c\uff0c\u56e0\u6b64\u76f4\u63a5\u66ff\u6362\u6389nvdla\u7684\u6700\u5916\u5c42sram wrapper\uff0c\u5728\u4e0a\u4f8b\u4e2d\u5373\u76f4\u63a5\u66ff\u6362\u6389nv_ram_rwsp_20x289\uff0c\u5e76\u4e14\u5c3d\u53ef\u80fd\u9009\u7528pesuado dual port sram\u6765\u66ff\u6362\uff0c\u5982\u679csize\u9700\u6c42\u65e0\u6cd5\u6ee1\u8db3\uff0c\u518d\u4f7f\u7528dual port sram\u3002<\/p>\n\n\n\n
TSMC28 MC2\u7684\u5e93\u4e2d\u6ca1\u6709pseudo dual port sram\uff0c\u56e0\u6b64\u75282prf\u4ee3\u66ff\uff0ctsn28hpcp2prf_20120200_130a<\/code>\u3001tsn28hpcpuhddpsram_20120200_170a<\/code>\u548ctsn28hpcpdpsram_20120200_130a<\/code>\uff0c\u7b2c\u4e00\u4e2a\u662f2prf\uff0c\u540e\u4e24\u4e2a\u90fd\u662fdpsram\uff0c\u5b83\u4eec\u5206\u522b\u652f\u6301\u7684size(depth*width)\u5982\u4e0b\uff1a<\/p>\n\n\n\n
SEG Option<\/th>Mux (CM)<\/th>Word Depth (W)<\/th>Word Width (I\/O) (N)<\/th><\/tr><\/thead>
F<\/td>2<\/td>16,24,32, 48,56\u202696, 112,120\u2026160, 176,184\u2026224, 240,248\u2026288, 304,312\u2026352, 368,376\u2026416, 432,440\u2026480, 496,504\u2026512<\/td>2,3\u2026144<\/td><\/tr>
F<\/td>4<\/td>32,48,64, 96,112\u2026192, 224,240\u2026320, 352,368\u2026448, 480,496\u2026576, 608,624\u2026704, 736,752\u2026832, 864,880\u2026960, 992,1008\u20261024<\/td>2,3\u202672<\/td><\/tr>
F<\/td>8<\/td>64,96,128, 192,224\u2026384, 448,480\u2026640, 704,736\u2026896, 960,992\u20261152, 1216,1248\u20261408, 1472,1504\u20261664, 1728,1760\u20261920, 1984,2016\u20262048<\/td>2,3\u202636<\/td><\/tr>
S<\/td>2<\/td>64, 80,88\u2026192, 208,216\u2026320, 336,344\u2026448, 464,472\u2026512<\/td>2,3\u2026144<\/td><\/tr>
S<\/td>4<\/td>128, 160,176\u2026384, 416,432\u2026640, 672,688\u2026896, 928,944\u20261024<\/td>2,3\u202672<\/td><\/tr>
S<\/td>8<\/td>256, 320,352\u2026768, 832,864\u20261280, 1344,1376\u20261792, 1856,1888\u20262048<\/td>2,3\u202636<\/td><\/tr><\/tbody><\/table>
tsn28hpcp2prf_20120200_130a size\u914d\u7f6e\u8868<\/figcaption><\/figure>\n\n\n\n
Segment Option<\/th>Mux Option<\/th>Word Depth<\/th>Word Width (I\/O)<\/th><\/tr><\/thead>
SEG<\/td>CM<\/td>W<\/td>N<\/td><\/tr>
M<\/td>4<\/td>32,48…4096<\/td>10,11…144<\/td><\/tr><\/tbody><\/table>
tsn28hpcpuhddpsram_20120200_170a size\u914d\u7f6e\u8868<\/figcaption><\/figure>\n\n\n\n
SEG Option<\/th>Mux<\/th>Word Depth<\/th>Word Width (I\/O)<\/th><\/tr><\/thead>
F<\/td>4<\/td>32,48\u20261024<\/td>4,5\u202672<\/td><\/tr>
<\/td>8<\/td>64,96\u20262048<\/td>4,5\u202636<\/td><\/tr>
<\/td>16<\/td>128,192\u20264096<\/td>4,5\u202618<\/td><\/tr>
M<\/td>4<\/td>32,48\u20262048<\/td>4,5\u202672<\/td><\/tr>
<\/td>8<\/td>64,96\u20264096<\/td>4,5\u202636<\/td><\/tr>
<\/td>16<\/td>128,192\u20268192<\/td>4,5\u202618<\/td><\/tr><\/tbody><\/table>
tsn28hpcpdpsram_20120200_130a size\u914d\u7f6e\u8868<\/figcaption><\/figure>\n\n\n\n
\u6309\u7167hw\/outdir\/nv_small\/vmod\/rams\/synth\/<\/code>\u4e2d\u7684sram size\uff0c\u6311\u9009\u5408\u9002\u7684\u914d\u7f6e\u586b\u5199MC2\u9700\u8981\u7684config.txt\uff0c\u90e8\u5206sram\u9700\u8981\u62fc\u63a5\uff0c\u4e5f\u6709depth\u6ca1\u6709\u5408\u9002\u7684\u60c5\u51b5\u9700\u8981\u5197\u4f59\u4e00\u4e9bword\uff0c#<\/code>\u540e\u7684\u6ce8\u91ca\u6709\u8bf4\u660e\uff0c\u6240\u6709sram\u90fd\u91c7\u7528tsn28hpcp2prf_20120200_130a<\/code>\u751f\u6210\uff0c\u5176config.txt\u5185\u5bb9\u5982\u4e0b\uff1a<\/p>\n\n\n\n
128x18m2f\n128x128m2f # 128x128 * 2 = 128x256\n128x64m2f\n16x128m2f  # 16x128 * 2 = 16x256\n16x136m2f  # 16x136 * 2 = 16x272\n16x64m2f\n256x3m2f\n256x128m2f # 256x128 * 4 = 256x512\n256x64m2f\n256x7m2f\n32x16m2f\n32x128m2f  # 32x128 * 2 = 32x256; 32x128 * 4 = 32x512; 32x128 * 6 = 32x768\n32x136m2f  # 32x136 * 2 = 32x272; 32x136 * 4 = 32x544\n512x128m2f # 512x128 * 2 = 512x256;\n512x64m2f\n64x10m2f\n64x128m2f  # 64x128 * 8 = 64x1024\n64x136m2f  # 64x136 * 8 = 64x1088\n64x116m2f\n64x18m2f\n128x11m2f\n128x6m2f\n160x16m2f\n160x144m2f # 160x144 * 3 + 160x82 = 160x514\n160x82m2f\n160x65m2f\n24x128m2f  # 24x128 * 2 + 24x33 = 24*289 (use as 20x289)\n248x144m2f # 248x144 * 3 + 248x82 = 248x514 (use as 245x514)\n248x82m2f\n256x11m2f\n32x32m2f\n64x144m2f  # 64x144 * 3 + 64x82 = 64x514 (use as 61x514)\n64x82m2f\n64x64m2f   # use as 61x64\n64x65m2f   # use as 61x65\n80x14m2s\n80x16m2s\n80x128m2s # 80x128 * 2 = 80x256\n80x144m2s # 80x144 * 3 + 80x82 = 80x514\n80x82m2s\n80x65m2s\n16x65m2f  # use as 8x65\n256x8m2f\n24x32m2f  # use as 19x32\n24x4m2f   # use as 19x4\n24x80m2f  # use as 19x80\n64x84m2f  # 64x84 * 2 = 64x168, use as 60x168\n64x21m2f  # use as 60x21\n80x15m2s\n80x72m2s\n80x9m2s<\/code><\/pre>\n\n\n\n
\u8fd0\u884cmc2\u751f\u6210sram\uff0c\u811a\u672c\u5982\u4e0b\uff1a<\/p>\n\n\n\n
#!\/bin\/bash\n.\/tsn28hpcp2prf_130a.pl -NonBWEB -file config.txt 2>&1 | tee \"cfg.log\"\nfor cfg_file in *.cfg; do\n    base_name=$(basename \"$cfg_file\" .cfg)\n    mkdir -p \"$base_name\"\n    log_file=\"$base_name\/${base_name}.log\"\n    mc2-eu -eu -c tsn28hpcp2prf_20120200_130a.mco -cfg $cfg_file -ui textual -v -p tsmceva -d $base_name 2>&1 | tee \"$log_file\"\ndone<\/code><\/pre>\n\n\n\n
\u5b9e\u9645\u4e0a\u6709\u4e00\u4e9bsram\u6ca1\u6709\u7528\u5230\uff0c\u53ef\u4ee5\u7528\u4e00\u4e0bgen_sram_inst.sh\u811a\u672c\u6293\u4e00\u4e0bsram\u7684\u4f8b\u5316\u60c5\u51b5\uff1a<\/p>\n\n\n\n
#!\/bin\/bash\n\n# \u4f7f\u7528\u65b9\u6cd5\uff1a.\/find_sram_inst.sh <\u76ee\u6807\u76ee\u5f55>\n# \u751f\u6210sram_inst.f\u6587\u4ef6\uff0c\u5305\u542b\u6240\u6709\u88ab\u4f8b\u5316\u7684SRAM\u6a21\u5757\n\nnvdla_sram_synth_dir=\"$1\"\nprj_dir=\"$2\"\noutput_file=\"sram_inst.f\"\n\n# \u63d0\u53d6\u6240\u6709SRAM\u6a21\u5757\u540d\nmodules=$(ls $nvdla_sram_synth_dir | grep -E '_[0-9]+[xX][0-9]+\\.v$' | sed 's\/\\.v$\/\/')\n\n# \u521d\u59cb\u5316\u8f93\u51fa\u6587\u4ef6\n> \"$output_file\"\n\nfor module in $modules; do\n    # \u5728\u76ee\u6807\u76ee\u5f55\u4e2d\u641c\u7d22.v\u548c.sv\u6587\u4ef6\uff08\u6392\u9664\u6307\u5b9a\u7c7b\u578b\uff09\n    # \u4f7f\u7528\u6b63\u5219\u8868\u8fbe\u5f0f\u5339\u914d\u4e24\u79cd\u4f8b\u5316\u683c\u5f0f\n    echo \"Searching $module\"\n    found=$(find \"$prj_dir\" -type f \\( -name \"*.v\" -o -name \"*.sv\" \\) \\\n        ! -name \"*logic.v\" ! -name \"*.vcp\" ! -name \"*.log\" ! -name \"*.f\" \\\n        -exec grep -E -m1 \"\\b${module}\\b(\\s*#\\s*\\([^)]*\\))?\\s+\\w+\\s*\\(\" {} + 2>\/dev\/null)\n\n    if [ -n \"$found\" ]; then\n        echo \"$found\"\n        echo \"$module\" >> \"$output_file\"\n    fi\ndone\n\necho \"SRAM instance search complete, saved to\uff1a$output_file\"\n<\/code><\/pre>\n\n\n\n
\u4f7f\u7528\u793a\u4f8b\uff1a<\/p>\n\n\n\n
# \u8f93\u51fa sram_inst.f\n.\/gen_sram_inst.sh nvdla\/hw\/outdir\/nv_small\/vmod\/rams\/synth\/ nvdla\/hw\/outdir\/nv_small\/ <\/code><\/pre>\n\n\n\n
\u63a5\u4e0b\u6765\u751f\u6210sram_wrapper\uff0c\u5305\u542bsram ip\u7684\u4f8b\u5316\u4ee5\u53ca\u4f4d\u62fc\u63a5\u903b\u8f91\uff0c\u811a\u672c\u5982\u4e0b\uff1a<\/p>\n\n\n\n
import os\nimport re\nimport math\nimport argparse\n\ndef parse_fcp_line(line):\n    line = line.strip()\n    if not line:\n        return None\n    parts = line.split('#', 1)\n    wrapper_name = parts[0].strip()\n    comment = parts[1].strip() if len(parts) > 1 else None\n\n    # Parse wrapper's depth and width\n    size_part = wrapper_name.split('_')[-1]\n    depth, width = map(int, size_part.split('x'))\n\n    # Parse comment to get base segments\n    segments = []\n    if comment:\n        segment_pattern = re.compile(r'\\s*(\\d+)x(\\d+)(?:\\s*\\*\\s*(\\d+))?')\n        for part in comment.split('+'):\n            part = part.strip()\n            match = segment_pattern.match(part)\n            if not match:\n                raise ValueError(f\"Invalid comment segment: {part}\")\n            seg_depth = int(match.group(1))\n            seg_width = int(match.group(2))\n            seg_count = int(match.group(3)) if match.group(3) else 1\n            segments.append({\n                'depth': seg_depth,\n                'width': seg_width,\n                'count': seg_count\n            })\n    else:\n        segments.append({\n            'depth': depth,\n            'width': width,\n            'count': 1\n        })\n    return {\n        'wrapper_name': wrapper_name,\n        'depth': depth,\n        'width': width,\n        'segments': segments\n    }\n\ndef find_sram_module(base_dir, target_depth, target_width):\n    target_size = f\"{target_depth}x{target_width}\"\n    candidates = []\n    for dir_name in os.listdir(base_dir):\n        dir_path = os.path.join(base_dir, dir_name)\n        if os.path.isdir(dir_path):\n            matches = re.findall(r'(\\d+)x(\\d+)', dir_name)\n            for d, w in matches:\n                if f\"{d}x{w}\" == target_size:\n                    candidates.append(dir_name)\n                    break\n    if not candidates:\n        raise ValueError(f\"No module found for {target_size}: {candidates}\")\n        return None\n    elif len(candidates) > 1:\n        raise ValueError(f\"Multiple modules found for {target_size}: {candidates}\")\n    else:\n        return candidates[0]\n\ndef generate_wrapper(wrapper_info, sram_dir, output_dir):\n    wrapper_name = wrapper_info['wrapper_name']\n    depth = wrapper_info['depth']\n    width = wrapper_info['width']\n    segments = wrapper_info['segments']\n\n    address_width = math.ceil(math.log2(depth)) if depth > 0 else 0\n\n    instances = []\n    current_bit = 0\n    for seg in segments:\n        seg_depth = seg['depth']\n        seg_width = seg['width']\n        seg_count = seg['count']\n        module_name = find_sram_module(sram_dir, seg_depth, seg_width)\n        if not module_name:\n            raise ValueError(f\"No module found for {seg_depth}x{seg_width}\")\n\n        for _ in range(seg_count):\n            start_bit = current_bit\n            end_bit = current_bit + seg_width - 1\n            current_bit += seg_width\n            instances.append({\n                'module_name': module_name,\n                'start_bit': start_bit,\n                'end_bit': end_bit,\n                'width': seg_width,\n                'instance_name': f\"sram_{len(instances)}\",\n                'dout_wire': f\"dout{len(instances)}\"\n            })\n\n    total_width = sum(inst['width'] for inst in instances)\n    if total_width != width:\n        raise ValueError(f\"Total width {total_width} != {width} for {wrapper_name}\")\n\n    sorted_instances = sorted(instances, key=lambda x: -x['start_bit'])\n\n    verilog_code = []\n    verilog_code.append(f\"module {wrapper_name} (\")\n    verilog_code.append(f\"   input clk,\")\n    verilog_code.append(f\"   input [{address_width-1}:0] ra,\")\n    verilog_code.append(f\"   input re,\")\n    verilog_code.append(f\"   output [{width-1}:0] dout,\")\n    verilog_code.append(f\"   input [{address_width-1}:0] wa,\")\n    verilog_code.append(f\"   input we,\")\n    verilog_code.append(f\"   input [{width-1}:0] di,\")\n    verilog_code.append(f\"   input pwrbus_ram_pd\")\n    verilog_code.append(f\");\\n\")\n\n    for inst in instances:\n        verilog_code.append(f\"wire [{inst['width']-1}:0] {inst['dout_wire']};\")\n\n    for inst in instances:\n        verilog_code.append(f\"{inst['module_name']} {inst['instance_name']} (\")\n        verilog_code.append(f\"   .AA(wa),\")\n        verilog_code.append(f\"   .D(di[{inst['end_bit']}:{inst['start_bit']}]),\")\n        verilog_code.append(f\"   .WEB(~we),\")\n        verilog_code.append(f\"   .CLKW(clk),\")\n        verilog_code.append(f\"   .AB(ra),\")\n        verilog_code.append(f\"   .Q({inst['dout_wire']}),\")\n        verilog_code.append(f\"   .REB(~re),\")\n        verilog_code.append(f\"   .CLKR(clk)\")\n        verilog_code.append(f\");\\n\")\n\n    dout_parts = [inst['dout_wire'] for inst in sorted_instances]\n    verilog_code.append(f\"assign dout = {{ {', '.join(dout_parts)} }};\")\n    verilog_code.append(\"endmodule\")\n\n    output_file = os.path.join(output_dir, f\"{wrapper_name}.v\")\n    with open(output_file, 'w') as f:\n        f.write('\\n'.join(verilog_code))\n\ndef main():\n    parser = argparse.ArgumentParser(description='Generate SRAM wrappers.')\n    parser.add_argument('--input', required=True, help='Path to sram_inst.fcp file')\n    parser.add_argument('--sram_dir', required=True, help='Directory containing SRAM modules')\n    parser.add_argument('--output_dir', required=True, help='Output directory for wrappers')\n    args = parser.parse_args()\n\n    with open(args.input, 'r') as f:\n        lines = f.readlines()\n\n    os.makedirs(args.output_dir, exist_ok=True)\n\n    for line in lines:\n        line = line.strip()\n        if not line:\n            continue\n        try:\n            wrapper_info = parse_fcp_line(line)\n            if wrapper_info:\n                generate_wrapper(wrapper_info, args.sram_dir, args.output_dir)\n        except Exception as e:\n            print(f\"Error processing line '{line}': {e}\")\n\nif __name__ == '__main__':\n    main()\n<\/code><\/pre>\n\n\n\n
\u4f7f\u7528\u793a\u4f8b:<\/p>\n\n\n\n
python3 gen_sram_wrapper.py --input sram_inst.fcp --sram_dir \/iccad\/lib\/sram\/nvdla_sram\/TSMCHOME\/sram\/Compiler\/tsn28hpcp2prf_20120200_130a --output_dir .<\/code><\/pre>\n\n\n\n
--input<\/code>: \u9700\u8981\u8f93\u5165\u4e00\u4e2asram_inst.fcp\u6587\u4ef6\uff0c\u7531gen_sram_inst.sh\u811a\u672c\u8f93\u51fasram_inst.f\uff0c\u9700\u8981\u624b\u52a8\u8865\u5145\u4e00\u4e0b\u62fc\u63a5\u4fe1\u606f\uff0c\u793a\u4f8b\u5982\u4e0b\uff1a<\/p>\n\n\n\n
nv_ram_rws_128x18\nnv_ram_rws_16x256 # 16x128 * 2\nnv_ram_rws_16x272 # 16x136 * 2\nnv_ram_rws_16x64\nnv_ram_rws_256x3\nnv_ram_rws_256x64\nnv_ram_rws_256x7\nnv_ram_rws_32x16\nnv_ram_rws_64x10\nnv_ram_rwsp_128x11\nnv_ram_rwsp_128x6\nnv_ram_rwsp_160x16\nnv_ram_rwsp_160x65\nnv_ram_rwsp_20x289 # 24x128 * 2 + 24x33\nnv_ram_rwsp_245x514 # 248x144 * 3 + 248x82\n<\/code><\/pre>\n\n\n\n
--sram_dir<\/code>:\u6307\u5b9asram ip\u7684\u4f4d\u7f6e\uff0c\u5176\u76ee\u5f55\u7ed3\u6784\u5982\u4e0b:<\/p>\n\n\n\n
\u276f tree -d \/iccad\/lib\/sram\/nvdla_sram\/TSMCHOME\/sram\/Compiler\/tsn28hpcp2prf_20120200_130a\n\/iccad\/lib\/sram\/nvdla_sram\/TSMCHOME\/sram\/Compiler\/tsn28hpcp2prf_20120200_130a\n\u251c\u2500\u2500 ts6n28hpcphvta128x11m2fbso\n\u2502   \u251c\u2500\u2500 DATASHEET\n\u2502   \u251c\u2500\u2500 DFT\n\u2502   \u2502   \u251c\u2500\u2500 ATPG\n\u2502   \u2502   \u2514\u2500\u2500 MBIST\n\u2502   \u251c\u2500\u2500 GDSII\n\u2502   \u251c\u2500\u2500 LEF\n\u2502   \u251c\u2500\u2500 LOG\n\u2502   \u251c\u2500\u2500 NLDM\n\u2502   \u251c\u2500\u2500 SPICE\n\u2502   \u2514\u2500\u2500 VERILOG\n\u251c\u2500\u2500 ts6n28hpcphvta128x128m2fbso\n\u2502   \u251c\u2500\u2500 DATASHEET\n\u2502   \u251c\u2500\u2500 DFT\n\u2502   \u2502   \u251c\u2500\u2500 ATPG\n\u2502   \u2502   \u2514\u2500\u2500 MBIST\n\u2502   \u251c\u2500\u2500 GDSII\n\u2502   \u251c\u2500\u2500 LEF\n\u2502   \u251c\u2500\u2500 LOG\n\u2502   \u251c\u2500\u2500 NLDM\n\u2502   \u251c\u2500\u2500 SPICE\n\u2502   \u2514\u2500\u2500 VERILOG<\/code><\/pre>\n\n\n\n
<\/p>\n","protected":false},"excerpt":{"rendered":"
\u4f7f\u7528TSMC28\u5de5\u827a\u5e93\u5b9e\u73b0\uff0c\u5168\u90e8\u8d44\u6599\u6765\u6e90\u4e8e\u516c\u5f00\u7f51\u7edc\uff0c\u4ec5\u4f9b\u5b66\u4e60\u4ea4\u6d41\uff0c\u4fb5\u6743\u8bf7\u8054\u7cfb\u5220\u9664\u3002 RTL\u4ee3\u7801\u751f\u6210 NVDLA […]<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[8],"tags":[5],"class_list":["post-76","post","type-post","status-publish","format-standard","hentry","category-dft","tag-dft"],"_links":{"self":[{"href":"https:\/\/zoneofee.cn\/index.php\/wp-json\/wp\/v2\/posts\/76","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/zoneofee.cn\/index.php\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/zoneofee.cn\/index.php\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/zoneofee.cn\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/zoneofee.cn\/index.php\/wp-json\/wp\/v2\/comments?post=76"}],"version-history":[{"count":29,"href":"https:\/\/zoneofee.cn\/index.php\/wp-json\/wp\/v2\/posts\/76\/revisions"}],"predecessor-version":[{"id":109,"href":"https:\/\/zoneofee.cn\/index.php\/wp-json\/wp\/v2\/posts\/76\/revisions\/109"}],"wp:attachment":[{"href":"https:\/\/zoneofee.cn\/index.php\/wp-json\/wp\/v2\/media?parent=76"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/zoneofee.cn\/index.php\/wp-json\/wp\/v2\/categories?post=76"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/zoneofee.cn\/index.php\/wp-json\/wp\/v2\/tags?post=76"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}