{"id":59,"date":"2025-01-21T17:16:47","date_gmt":"2025-01-21T09:16:47","guid":{"rendered":"https:\/\/zoneofee.cn\/?p=59"},"modified":"2025-09-06T00:57:28","modified_gmt":"2025-09-05T16:57:28","slug":"tessent-core-description-memory%e9%83%a8%e5%88%86%e8%a7%a3%e6%9e%90%ef%bc%9a1-%e5%8f%82%e6%95%b0%e6%80%bb%e8%a7%88","status":"publish","type":"post","link":"https:\/\/zoneofee.cn\/index.php\/2025\/01\/21\/tessent-core-description-memory%e9%83%a8%e5%88%86%e8%a7%a3%e6%9e%90%ef%bc%9a1-%e5%8f%82%e6%95%b0%e6%80%bb%e8%a7%88\/","title":{"rendered":"Tessent Core Description \u2014\u2014 Memory Section \u89e3\u6790\uff1a1 \u53c2\u6570\u603b\u89c8"},"content":{"rendered":"\n

\u2014\u2014\u5185\u5bb9\u53c2\u8003\u300aTessent\u2122 MemoryBIST User\u2019s Manual For Use With Tessent Shell\u300b Appendix A<\/p>\n\n\n\n

TCD\uff08Tessent Core Description\uff09\u6587\u4ef6\u53ef\u7528\u4e8e\u63cf\u8ff0Memory\u7684\u7aef\u53e3\u53ca\u884c\u4e3a\uff0c\u7528\u4e8eTessent Memory BIST\u6d41\u7a0b\uff0cMemory\u7684TCD\u6587\u4ef6\u53ef\u4ee5\u7531LogicVision memory library\u683c\u5f0f\u7684\u6587\u4ef6\u8f6c\u4e3aTCD\uff0cLogicVision\u6587\u4ef6\u7531Memory Compiler\u5de5\u5177\u4ea7\u751f\uff0c\u540e\u7f00\u4e3alogicv.lib\u3002<\/p>\n\n\n\n

\u7b80\u4ecb<\/h2>\n\n\n\n

\u5728tshell\uff08Tessent Shell\uff09\u4e2d\uff0cTCD\u53ef\u7528\u4e8e\u63cf\u8ff0memory library\u3001boundary scan information\u6216fuse box interface\uff0c\u8bfb\u5165\u4e4b\u540e\u4ee5Core Wrapper\u7684\u5f62\u5f0f\u5728tshell\u5185\u90e8\u5b58\u50a8\uff0c\u6bcf\u4e2amodule name\u662f\u552f\u4e00\u7684\uff0c\u8fd9\u91ccmodule_name\u5c31\u662fdesign top name\uff1a<\/p>\n\n\n\n

Core(module_name) {\n    Memory {\n    }\n    MemoryCluster {\n    }\n    BoundaryScan {\n    }\n    FuseBoxInterface {\n    }\n}<\/code><\/pre>\n\n\n\n
TCD\u53ef\u4ee5\u901a\u8fc7read_core_descriptions<\/code>\u547d\u4ee4\u8bfb\u5165\uff08tshell\u53ef\u4ee5\u8bfb\u5165Memory\u7684logicv.lib\u6587\u4ef6\uff0c\u81ea\u52a8\u8f6c\u4e3aTCD\u683c\u5f0f\uff0c\uff09\uff1a<\/p>\n\n\n\n
read_core_descriptions *logicv.lib<\/code><\/pre>\n\n\n\n
\u901a\u8fc7report_config_data<\/code>\u8bfb\u51fa\uff1a<\/p>\n\n\n\n
report_config_data -partition tcd<\/code><\/pre>\n\n\n\n
Memory<\/h2>\n\n\n\n
\u4e00\u4e2a\u5b8c\u6574\u7684Memory TCD\u6587\u4ef6\u683c\u5f0f\u5982\u4e0b\uff1a<\/p>\n\n\n\n
Core(module_name) {\n    Memory {\n        Algorithm : algo_name;\n        ATD : on | off;\n        BitGrouping : int | auto;\n        ConcurrentRead : on | off;\n        ConcurrentWrite : on | off;\n        DataOutHoldWithInactiveReadEnable : on | off;\n        DataOutStage : none | StrobingFlop\n        InternalScanLogic : on | off;\n        LogicalPorts : nRnWnRW;\n        MemoryHoldWithInactiveSelect : on | off;\n        MemoryType : rom | sram | dram;\n        MilliWattsPerMegaHertz : real | auto;\n        MinHold : time; \/\/ default: 0\n        NumberOfBits : int | auto;\n        NumberOfWords : int | auto;\n        ObservationLogic : on | off;\n        OperationSet : operation_set_name;\n        PipelineDepth : int; \/\/ default: 0\n        ReadOutOfRangeOK : on | off;\n        RetentionTimeMax : time | none;\n        RomContentsFile : file_path_name;\n        ShadowRead : on | off | auto;\n        ShadowWrite : on | off;\n        ShadowWriteOK : on | off;\n        TransparentMode : syncmux | none | asyncmux;\n        Port(port_name) {\n        }\n        AddressCounter {\n        }\n        PhysicalAddressMap {\n        }\n        PhysicalDataMap {\n        }\n        GroupWriteEnableMap {\n        }\n        RedundancyAnalysis {\n        }\n        IclPorts {\n        }\n    }\n}<\/code><\/pre>\n\n\n\n
Algorithm: algo_name<\/em><\/h3>\n\n\n\n
\u200b \u6307\u5b9aMBIST\u7b97\u6cd5\uff0c\u6700\u5e38\u7528\u7684\u662fSMarchCHKBvcd\u7b97\u6cd5\u3002<\/p>\n\n\n\n
ATD\uff08address transition detection\uff09: on | off<\/u><\/h3>\n\n\n\n
\u5f00\u542f\u6216\u5173\u95ed\u5730\u5740\u8df3\u53d8\u68c0\u6d4b\uff0c\u76f8\u5f53\u4e8eMemory\u7684AT-Speed\u6d4b\u8bd5\uff0c\u68c0\u6d4b\u5730\u5740\u7684\u8df3\u53d8\u662f\u5426\u6ee1\u8db3spec\u7684\u65f6\u5e8f\u8981\u6c42\u3002<\/p>\n\n\n\n
BitGrouping : int | auto<\/u><\/h3>\n\n\n\n
\u63cf\u8ff0Memory\u4e2d\u4e00\u4e2aword\u7684\u7269\u7406\u5206\u5e03\u60c5\u51b5\uff0c\u4e00\u4e2aword\u7684bit\u4f4d\u53ef\u4ee5\u5728\u540c\u4e00\u884c\u7d27\u6328\u5728\u4e00\u8d77\uff0c\u4e5f\u53ef\u4ee5\u95f4\u9694\u5206\u5e03\uff0c\u4e0d\u540c\u7684\u5206\u5e03\u4f1a\u5f71\u54cd\u6d4b\u8bd5\u7b97\u6cd5\u7684\u751f\u6210\uff0c\u4ee5\u4e0b\u662f\u51e0\u4e2a\u793a\u4f8b\uff1a<\/p>\n\n\n\n
1\u3001\u8fd9\u662f\u4e00\u4e2a8bit\u7684memory\uff0cMBIST controller\u9700\u8981\u5728\u7269\u7406\u76f8\u90bb\u7684\u4f4d\u7f6e\u4e0a\u4ea4\u66ff\u5199\u51650\u30011\uff0c\u8fd9\u79cd\u60c5\u51b5\u4e0b\uff0cBitGrouping<\/code>=8\uff1a<\/span><\/p>\n\n\n
\n
\"\"<\/div><\/figure>\n<\/div>\n\n\n
2\u3001 \u4e00\u4e2a4bit\u4f4d\u5bbd\u7684memory\u793a\u4f8b\uff0c\u6bcf\u4e2aword\u76844\u4e2abit\u95f4\u9694\u5206\u5e03\uff0cBitGrouping<\/code>=1\uff1a<\/span><\/p>\n\n\n
\n
\"\"<\/div><\/figure>\n<\/div>\n\n\n
3\u3001\u4e00\u4e2a6bit\u4f4d\u5bbd\u7684memory\u793a\u4f8b\uff0c\u4e00\u4e2aword\u4e2d\u7684\u524d3bit\u4e3a\u4e00\u7ec4\uff0c\u540e3bit\u4e3a\u4e00\u7ec4\uff0c\u95f4\u9694\u5206\u5e03\uff0cBitGrouping<\/code>=3\uff1a<\/p>\n\n\n
\n
\"\"<\/div><\/figure>\n<\/div>\n\n\n
ConcurrentRead: on | off<\/u><\/h3>\n\n\n\n
\u9488\u5bf9\u591a\u7aef\u53e3\u7684memory\uff0c\u5f00\u542f\u540e\u53ef\u4ee5\u5728\u6d4b\u8bd5\u7b97\u6cd5\u5bf9active port\u8bfb\u5199\u65f6\u540c\u65f6\u5bf9inactive port\u8bfb\uff0c\u7528\u4e8e\u6d4b\u8bd5\u591a\u7aef\u53e3\u4e4b\u95f4\u7684\u8026\u5408\u6545\u969c\uff0c\u9700\u8981\u7528\u6237\u63d0\u4f9b\u5bf9\u5e94\u7684operation sets\uff0c\u9ed8\u8ba4\u4e3aoff\u3002<\/p>\n\n\n\n
\u8be5\u9009\u9879\u5f00\u542f\u540e\uff0c\u4f1a\u5728memory interface\u4e0a\u63d2\u5165\u989d\u5916\u7684\u7535\u8def\u3002<\/p>\n\n\n\n
ConcurrentRead<\/code>\u76f8\u8f83\u4e8eShadowRead<\/code>\u66f4\u52a0\u7075\u6d3b\uff0c\u53ef\u4ee5\u6307\u5b9arow\uff08word\uff09\u548ccolumn\uff08bit\uff09 address\uff0cShadowRead<\/code>\u4ec5\u80fd\u6307\u5b9arow address\u3002<\/p>\n\n\n\n
ConcurrentWrite: on | off<\/u><\/h3>\n\n\n\n
\u4e0eConcurrentRead<\/code>\u7c7b\u4f3c\uff0c\u76f8\u8f83\u4e8eShadowWrite\u7075\u6d3b\u6027\u66f4\u9ad8\uff0c\u53ef\u4ee5\u7531\u81ea\u5b9a\u4e49\u7684operation sets\u63a7\u5236\uff0cShadowWrite <\/code>\u53ea\u652f\u6301library algorithms\uff0c\u4e0d\u652f\u6301\u81ea\u5b9a\u4e49operation set\u3002<\/p>\n\n\n\n
\u9ed8\u8ba4\u503c\u4e3aoff\u3002<\/p>\n\n\n\n
\u4f7f\u7528\u8fd9\u4e2a\u9009\u9879\uff0c\u9700\u8981memory\u81f3\u5c11\u6ee1\u8db3\u5982\u4e0b\u6761\u4ef6\u4e2d\u7684\u4e00\u4e2a\uff1a<\/p>\n\n\n\n
    \n
  • Two ReadWrite ports\uff08\u771f\u53cc\u7aef\u53e3\uff09<\/li>\n\n\n\n
  • One Read-only port and one Write-only port<\/li>\n\n\n\n
  • Any number of Read-only ports and two Write-only ports<\/li>\n<\/ul>\n\n\n\n
    DataOutHoldWithInactiveReadEnable : on<\/u> | off<\/h3>\n\n\n\n
    \u6307\u5b9a\u5f53memory\u7684read enable\u65e0\u6548\u65f6\uff0c\u8f93\u51fa\u662f\u5426\u4fdd\u6301\u539f\u503c\uff0c\u8fd9\u4e2a\u9009\u9879\u4f1a\u5f71\u54cdSMarchCHKBvcd<\/code>\u7b97\u6cd5\u884c\u4e3a\uff0c\u9ed8\u8ba4\u503c\u662foff\uff0c\u6839\u636ememory\u5b9e\u9645\u7279\u6027\u8bbe\u7f6e\u3002<\/p>\n\n\n\n
    DataOutStage : none<\/u> | StrobingFlop<\/h3>\n\n\n\n
    \u53ef\u4ee5\u9009\u62e9\u662f\u5426\u5728memory data output\u52a0\u4e00\u7ea7\u9009\u901a\u5bc4\u5b58\u5668\uff0c\u7528\u4e8e\u6ee1\u8db3memory\u7684\u8bfb\u540e\u5199\u7684hold time\uff1f\u52a0\u5165\u8fd9\u4e2a\u9009\u901a\u5bc4\u5b58\u5668\u5b9e\u9645\u4e0a\u5728data output \u548c comparator \u903b\u8f91\u4e4b\u95f4\u52a0\u4e86\u4e00\u7ea7pipe\uff0c\u9ed8\u8ba4\u503c\u4e3anone\u3002<\/p>\n\n\n\n
    \u8fd9\u4e2a\u9009\u901a\u5bc4\u5b58\u5668\u8fd8\u4f1a\u5728scan\u65f6\u88ab\u7528\u4e8ebypass\uff0c\u53d7\u53c2\u6570 TransparentMode<\/code> \u63a7\u5236\u3002<\/p>\n\n\n\n
    InternalScanLogic : on | off<\/u><\/h3>\n\n\n\n
    \u8fd9\u4e2a\u53c2\u6570\u7528\u4e8e\u6307\u5b9amemory\u662f\u5426\u6709\u5185\u90e8\u7684scan\u903b\u8f91\uff0c\u901a\u5e38\u662f\u6307bypass logic\u4e2d\u7684DFF\uff08\u5728datain\u548cdataout\u4e4b\u95f4\uff09\uff0c\u901a\u5e38memory\u7684bypass\u903b\u8f91\u662ftshell\u5728\u5916\u90e8\u63d2\u5165\u7684\uff0c\u8fd9\u4e2a\u9009\u9879\u9ed8\u8ba4\u4e3aoff\uff0c\u5982\u679cmemory\u5185\u90e8\u6709bypass\uff0c\u5219\u9700\u8981\u5f00\u542f\u8fd9\u4e2a\u9009\u9879\uff0c\u5e76\u4e14\u63d0\u4f9bmemory scan model\uff0c\u5e76\u4e14\u5c06Core\/Memory\/ObservationLogic<\/code>\u8bbe\u4e3aoff\uff0c\u8fd9\u4e2a\u9009\u9879\u7528\u4e8etshell\u751f\u6210address\u548ccontrol inputs\u7684observe logic\uff0c\u540c\u65f6\u9700\u8981\u8bbe\u7f6e TransparentMode<\/code> \u4e3anone\u3002<\/p>\n\n\n\n
    LogicalPorts : nRnWnRW<\/h3>\n\n\n\n
    \u6307\u5b9amemory\u7684read write port\u3002<\/p>\n\n\n\n
    nR<\/strong>\uff1aread port number<\/p>\n\n\n\n
    nW<\/strong>\uff1awrite port number<\/p>\n\n\n\n
    nRW<\/strong>\uff1aReadWrite port number<\/p>\n\n\n\n
    sram\u7684\u9ed8\u8ba4\u503c\u662f1RW<\/code>\uff0crom\u7684\u9ed8\u8ba4\u503c\u662f1R<\/code>\uff0crom\u4e0d\u80fd\u6307\u5b9aW\u6216RW\uff0csram\u81f3\u5c11\u8981\u6307\u5b9a\uff081R<\/code>\u30011W<\/code>\uff09\u62161RW<\/code>\u3002<\/p>\n\n\n\n
    MemoryHoldWithInactiveSelect : on<\/u> | off<\/h3>\n\n\n\n
    \u7528\u4e8e\u6307\u793a\uff0c\u5f53\u7247\u9009\u4fe1\u53f7\u65e0\u6548\u65f6\uff0cmemory\u5185\u5bb9\u662f\u5426\u4fdd\u6301\uff0c\u5e76\u4e14memory\u7684\u8f93\u51fa\u662f\u5426\u4fdd\u6301\u4e0a\u4e00\u6b21read\u7684\u8f93\u51fa\uff0c\u9ed8\u8ba4\u60c5\u51b5\u4e0b\u4e3aon\u3002<\/p>\n\n\n\n
    \u8fd9\u4e2a\u9009\u9879\u4f1a\u5f71\u54cdSMarchCHKBvcd<\/code>\u7b97\u6cd5\u7684\u884c\u4e3a\u3002<\/p>\n\n\n\n
    MemoryType : rom | sram<\/u> | dram<\/h3>\n\n\n\n
    \u9ed8\u8ba4\u4e3asram\u3002<\/p>\n\n\n\n
    MilliWattsPerMegaHertz : real<\/em> | auto<\/u><\/h3>\n\n\n\n
    \u63cf\u8ff0power\u4e0efrequency\u4e4b\u95f4\u7684\u5173\u7cfb\u3002<\/p>\n\n\n\n
    \u9ed8\u8ba4\u4e3aauto\uff0c\u8ba1\u7b97\u516c\u5f0f\u4e3ab  (0.0004 + (c <\/em> 0.00008))\uff0c\u5176\u4e2db\u662fbits per word\uff0cc\u662fcolumn\u6216counm mux\u7684\u6570\u91cf\uff0c<\/p>\n\n\n\n
    MinHold : time<\/em>; \/\/ default: 0<\/h3>\n\n\n\n
    \u8fd9\u4e2a\u53c2\u6570\u63d0\u4f9bRTL\u9636\u6bb5\u4eff\u771f\u65f6\uff0cBIST controller\u8f93\u51faaddress\u3001data\u548c\u63a7\u5236\u4fe1\u53f7\u76f8\u5bf9clk\u7684delay\uff0c\u8fd9\u4e2adelay\u4e0d\u4f1a\u5f71\u54cd\u7efc\u5408\uff0c\u7efc\u5408\u65f6\u7684holdtime\u7ea6\u675f\u8fd8\u662f\u4f9d\u9760sdc\u4fdd\u8bc1\u3002
    \u5355\u4f4d\u4e3ans\uff0c\u6700\u591a\u4e24\u4f4d\u5c0f\u6570\uff0c\u9ed8\u8ba4\u662f0\uff0c\u8fd9\u4e2a\u503c\u4e0d\u80fd\u5927\u4e8eclk period\uff0c\u5426\u5219\u62a5\u9519\u3002<\/p>\n\n\n\n
    NumberOfBits : int<\/em> | auto<\/u><\/h3>\n\n\n\n
    bits per word\uff0c\u5982\u679c\u6ca1\u6307\u5b9a\uff0c\u9ed8\u8ba4\u503c\u662f\u7b2c\u4e00\u4e2alogical port\u7684output data width\uff0c\u4e00\u4e2a32X8\u7684memory\uff0c\u8868\u793adepth=32\uff0cbits per word=8\u3002<\/p>\n\n\n\n
    NumberOfWords : int<\/em> | auto<\/u><\/h3>\n\n\n\n
    number of words\uff0c\u8fd9\u4e2a\u503c\u9ed8\u8ba4\u4e3aAddressCounter<\/code>\u5b57\u6bb5\u4e2d\u5b9a\u4e49\u7684columns*rows*banks\u3002<\/p>\n\n\n\n
    \u5982\u679c\u6307\u5b9a\u4e86AddressCounter\/CountRange<\/code>\uff0c\u5219\u4f7f\u7528\u8fd9\u4e2a\u503c\uff0c\u5982\u679c\u6ca1\u6307\u5b9a\uff0c\u5219\u9ed8\u8ba4\u662f$2^n, n=address width$ \u3002<\/p>\n\n\n\n
    \u5bf9\u4e8enon-segmented addresses\u6216\u8005\u5b9e\u9645\u5730\u5740\u8303\u56f4\u4e0d\u662f2\u7684\u5e42\u7684memory\uff0c\u9700\u8981\u6307\u5b9aNumberOfWords<\/code>\uff0c\u5426\u5219\u53ef\u80fd\u4f1a\u5bfc\u81f4\u4eff\u771f\u5931\u8d25\u3002\u4f8b\u5982\u4e00\u4e2a\u5730\u5740\u4f4d\u5bbd\u4e3a4bit\u7684memory\uff0c\u5b9e\u9645\u53ea\u670912\u4e2awords\uff0c\u5982\u679c\u4e0d\u6307\u5b9a NumberOfWords \u5c31\u4f1a\u4eff\u771f\u5931\u8d25\u3002<\/p>\n\n\n\n
    MBIST controller\u652f\u6301\u975e\u5bf9\u79f0bank\uff08\u6bcf\u4e2abank\u6709\u4e0d\u540c\u6570\u91cf\u7684rows\uff09\u7684memory\u6d4b\u8bd5\u3002\u8fd9\u79cd\u60c5\u51b5\u4e0b\uff0c\u5fc5\u987b\u4e3a\u6bcf\u4e2amemory address segment\u6307\u5b9aAddressCounter\/CountRange<\/code>\u3002\u5e76\u4e14\u9700\u8981\u6307\u5b9aNumberOfWords<\/code>\uff0c\u8868\u793a\u771f\u5b9e\u7684memory\u5730\u5740\u8303\u56f4\u4e3a0\u5230NumberOfWords-1\u3002<\/p>\n\n\n\n
    \u5bf9\u4e8e32X8\u7684memory\uff0cNumberOfWords\u4e3a32\u3002<\/p>\n\n\n\n
    \n
    \u95ee\u9898\uff1a\u4ec0\u4e48\u662fnon-segmented addresses\uff1f<\/p>\n<\/blockquote>\n\n\n\n
    ObservationLogic : on<\/u> | off<\/h3>\n\n\n\n
    \u7528\u4e8e\u6307\u793atshell\u662f\u5426\u5728memory interface\u4e2d\u4e3aaddress\u548ccontrol signal\u52a0\u5165scan observation point\u3002<\/p>\n\n\n\n
    \u8bbe\u7f6e\u4e3aon\u4f1a\u52a0\u5165XOR gate\u548c\u5bc4\u5b58\u5668\uff0c\u63d0\u4f9bobservation\uff0ctshell\u4f1a\u4f7f\u7528interface\u4e2d\u5df2\u6709\u7684\u5bc4\u5b58\u5668\uff0c\u5982\u679c\u6709\u5fc5\u8981\uff0c\u4e5f\u4f1a\u6dfb\u52a0\u989d\u5916\u7684\u5bc4\u5b58\u5668\u3002<\/p>\n\n\n\n
    OperationSet : Async | AsyncWR | ROM | (Sync) | SyncWR | SyncWRvcd |TessentSyncRamOps | TessentSyncRamOpsHR4 | TessentSyncRamOpsHR6 |OperationSetName<\/em><\/h3>\n\n\n\n
    \u6307\u5b9aoperation set\u7684\u540d\u5b57\uff0cMBIST controller\u4f1a\u6839\u636eoperation set\u751f\u6210\u6ce2\u5f62\u3002operation set\u5b9a\u4e49\u7684operation\u5fc5\u987b\u80fdalgorithm\u7684\u9700\u6c42\u3002<\/p>\n\n\n\n
    Async | AsyncWR | ROM | (Sync) | SyncWR | SyncWRvcd | TessentSyncRamOps |TessentSyncRamOpsHR4 | TessentSyncRamOpsHR6<\/code>
    \u4ee5\u4e0a\u8fd9\u4e9b\u662ftshell\u7684\u4fdd\u7559\u7684library operation set\uff0c\u7528\u6237\u4e5f\u53ef\u4ee5\u81ea\u5b9a\u4e49\u3002<\/p>\n\n\n\n
    \n
    Tip: \u63a8\u8350\u4f7f\u7528libraty operation set\u4f5c\u4e3a\u6a21\u677f\uff0c\u5b9a\u4e49custom operation set\uff0c\u56e0\u4e3alibrary\u4e2d\u7684\u662f\u6bd4\u8f83\u901a\u7528\u7684\uff0c\u6ca1\u6709\u9488\u5bf9\u67d0\u79cd\u7279\u5b9amemory\u505a\u4f18\u5316\u3002Custom operation sets\u53ef\u4ee5\u6ee1\u8db3\u7279\u5b9a\u7684\u65f6\u5e8f\u9700\u6c42\u3002<\/p>\n<\/blockquote>\n\n\n\n
    OperationSetName<\/code>\u662f\u7528\u6237\u5b9a\u4e49\u7684\u6807\u8bc6\uff0ctshell\u4f1a\u641c\u7d22\u4e0e\u4e4b\u5339\u914d\u7684\u5e93\u6587\u4ef6\uff08\u7531\u7528\u6237\u63d0\u4f9b\uff09\u3002<\/p>\n\n\n\n
    Library Operation Sets:<\/h4>\n\n\n\n
      \n
    • Async<\/code>: \u7528\u4e8e\u6ca1\u6709clock\u7684RAM\uff0c\u5305\u62ec\u4e09\u4e2aoperation\uff0cWrite<\/code>\u3001Read<\/code>\u548cReadModifyWrite<\/code>\u3002\u6bcf\u4e2aoperation\u9700\u89814 cycles\uff08\u8fd9\u91cc\u7684clock\u662f\u6307MBIST controller\u7684reference clock\uff09\u3002\u5728Read<\/code>\u548cReadModifyWrite<\/code>\u4e2d\u52a0\u5165\u4e86\u57fa\u7840\u7684shadow read\u64cd\u4f5c\u3002\u8fd9\u4e2aoperation set\u5f88\u5c11\u7528\u4e8e\u73b0\u4ee3memory\u4e86\u3002
      ReadModifyWrite<\/code>\uff1a\u8bfb-\u6539-\u5199\uff0c\u5bf9\u4e8e\u4e0d\u652f\u6301\u6309\u4f4d\u5199\u7684memory\uff0c\u5982\u679c\u9700\u8981\u6539\u52a8\u4e00\u4e2aword\u4e2d\u7684\u90e8\u5206\u4f4d\uff0c\u5c31\u9700\u8981\u5148\u8bfb\u51fa\uff0c\u4fee\u6539\u90e8\u5206\u4f4d\uff0c\u518d\u5199\u5165\u3002<\/p><\/blockquote><\/li>\n\n\n\n
    • AsyncWR<\/code>\uff1a\u662fAsync\u7684\u4e00\u4e2a\u53d8\u4f53\uff0c\u6bcf\u4e2aoperation\u75314\u4e2acycle\u53d8\u4e3a\u4e866\u4e2a\uff0c\u5e76\u4e14\u5728Write<\/code>\u64cd\u4f5c\u65f6\u4e5f\u52a0\u5165\u4e86shadow reads\u3002
      <\/li>\n\n\n\n
    • ROM<\/code>\uff1a\u7528\u4e8eROM\uff0c\u901a\u5e38\u4e0eReadOnly library algorithm\u7ec4\u5408\u4f7f\u7528\uff0c\u5b83\u53ea\u5305\u542b\u4e24\u79cdoperation\uff0cRead<\/code>\u548cCompareMISR<\/code>\uff0c\u6bcf\u4e2aoperation\u6267\u884c2 cycle\uff0c\u5bf9\u4e8e\u6709\u65e0clock\u7684ROM\u5747\u53ef\u4f7f\u7528\u3002
      <\/li>\n\n\n\n
    • Sync<\/code>\uff1a\u7528\u4e8e\u540c\u6b65RAM\uff08\u6709function clock\uff09\uff0c\u6709\u4e09\u4e2aoperation\uff0cWrite<\/code>\u3001Read<\/code>\u548cReadModifyWrite<\/code>\uff0c\u6bcf\u4e2aoperation\u6267\u884c2 cycle\uff0c\u5728Read<\/code>\u548cReadModifyWrite<\/code>\u4e2d\u52a0\u5165\u4e86\u57fa\u7840\u7684shadow read\u64cd\u4f5c\uff0c\u5b83\u4e0e\u5927\u90e8\u5206library algorithms\u90fd\u517c\u5bb9\u3002
      <\/li>\n\n\n\n
    • SyncWR<\/code>\uff1aSync\u7684\u4e00\u79cd\u53d8\u4f53\uff0c\u533a\u522b\u662f\u5728Write\u65f6\u4e5f\u52a0\u5165\u4e86shadow read\u3002
      <\/li>\n\n\n\n
    • SyncWRvcd<\/code>\uff1aSyncWR\u7684\u4e00\u79cd\u6269\u5c55\uff0c\u901a\u5e38\u4e0eSMarchCHKBvcd<\/code>\u5e93\u7b97\u6cd5\u7ed3\u5408\u4f7f\u7528\u3002\u5305\u542b12\u4e2aoperation\uff0c\u6bcf\u4e2aoperation\u6267\u884c2-3\u4e2acycle\u3002
      operation list\u5982\u4e0b\uff0c\u5b83\u63d0\u4f9b\u4e86\u66f4\u4e3a\u5b8c\u6574\u7684memory\u6d4b\u8bd5\uff0c\u4f8b\u5982bit\/byte write enable\u3001read enable\u4ee5\u53caselect\u4fe1\u53f7\u7684\u6d4b\u8bd5\u3002\u8fd8\u52a0\u5165\u4e86\u5e76\u884c\u8bfb\u5199\uff0c\u63d0\u9ad8\u4e86\u591a\u7aef\u53e3memory\u6d4b\u8bd5\u7684\u8986\u76d6\u7387\u3002
      <\/li>\n<\/ul>\n\n\n\n
      Code<\/th>Operation Name<\/th><\/tr><\/thead>
      OP0<\/td>NoOperation<\/td><\/tr>
      OP1<\/td>Write<\/td><\/tr>
      OP2<\/td>Read<\/td><\/tr>
      OP3<\/td>ReadModifyWrite<\/td><\/tr>
      OP4<\/td>ReadModifyWrite_WithSelectOff<\/td><\/tr>
      OP5<\/td>WriteReadCompare<\/td><\/tr>
      OP6<\/td>WriteReadCompare_EvenGWE_On<\/td><\/tr>
      OP7<\/td>WriteReadCompare_OddGWE_On<\/td><\/tr>
      OP8<\/td>WriteReadCompare_AllGWE_Off<\/td><\/tr>
      OP9<\/td>ReadWithReadEnableOff<\/td><\/tr>
      OP10<\/td>ReadModifyWrite_Column_ConcurrentWriteRead<\/td><\/tr>
      OP11<\/td>ReadModifyWrite_Row_ConcurrentWriteRead<\/td><\/tr>
      OP12<\/td>WriteRead_Column_ConcurrentReadWrite<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n
        \n
      • TessentSyncRamOps<\/code>\uff1aSyncWRvcd\u7684\u4e00\u79cd\u6269\u5c55\uff0c\u5305\u62ec25\u4e2aoperation\uff0c\u6bcf\u4e2a\u6267\u884c2-3 cycle\uff0c\u5b83\u652f\u6301\u6240\u6709library\u7b97\u6cd5\u7684\u5b9e\u73b0\uff0c\u4ee5\u53ca\u4e00\u4e9blib\/technology\/memory_bist\/algo<\/em>\u6587\u4ef6\u52a0\u4e2d\u7684\u6587\u732e\u4e2d\u7684\u4e00\u4e9b\u7b97\u6cd5\u3002<\/li>\n\n\n\n
      • TessentSyncRamOpsHR4<\/code>\uff1aTessentSyncRamOps\u7684\u4e00\u79cd\u53d8\u4f53\uff0c\u533a\u522b\u662f\u5728Read operation\u4e2d\uff0c\u5305\u62ec4\u4e2a\u8fde\u7eed\u8bfb\uff0cTessentSyncRamOps\u53ea\u5305\u542b\u4e24\u4e2a\u8fde\u7eed\u8bfb\uff0c\u65e8\u5728\u7b2c\u4e00\u6b21\u8bfb\u65f6compare\u3002<\/li>\n\n\n\n
      • TessentSyncRamOpsHR6<\/code>\uff1aTessentSyncRamOps\u7684\u4e00\u79cd\u53d8\u4f53\uff0c\u533a\u522b\u662fRead operation\u4e2d\u5305\u542b6\u4e2a\u8fde\u7eed\u8bfb\uff0c\u540c\u6837\u4e5f\u662f\u53ea\u5728\u7b2c\u4e00\u6b21\u8bfb\u65f6compare\u3002<\/li>\n<\/ul>\n\n\n\n
        Custom Operation Sets:<\/h4>\n\n\n\n
        \u6807\u51c6\u7684library operation sets\u53ea\u652f\u6301\u6709\u540c\u6b65\u8bfb\u5199port\u7684memory\uff08\u5bf9\u5e94Sync*OperationSets\uff09\uff0c\u6216\u5f02\u6b65\u8bfb\u5199port\uff08\u5bf9\u5e94Async*OperationSets\uff09\u3002\u5982\u679c\u4e00\u4e2amemory\u540c\u65f6\u6709\u540c\u6b65\u5199\u548c\u5f02\u6b65\u8bfb\u7aef\u53e3\uff0c\u5c31\u9700\u8981custom operation set\u4e86\u3002<\/p>\n\n\n\n
        \u5bf9\u4e8e\u5f02\u6b65\u8bfb\u7684memory\uff0c\u5f53read enable\u6709\u6548\u65f6\uff0cread data\u8f93\u51fa\u7acb\u5373\u6709\u6548\uff08\u540c\u62cd\uff09\uff0c\u5728operation set\u4e2d\uff0cStrobeDataOut\uff08\u8868\u793a\u9700\u8981compare read data\uff09\u9700\u8981\u5728\u7b2c\u4e00\u4e2aTick\u4e2d\u5199\uff0c\u4ee5\u4e0b\u7684custom operation set\u53ef\u7528\u4e8e\u6709\u540c\u6b65\u5199\u548c\u5f02\u6b65\u8bfb\u7aef\u53e3\u7684memory\uff1a<\/p>\n\n\n\n
        OperationSet (SyncW_AsyncR) {\n    Operation (Write) {\n        Tick {\n            WriteEnable : On;\n            ShadowReadEnable : On;\n            ShadowReadAddress : On;\n        }\n        Tick {\n            WriteEnable : Off;\n            ReadEnable : On;\n            ShadowReadAddress : Off;\n        }\n    }\n    Operation (Read) {\n        Tick {\n            StrobeDataOut;\n            ReadEnable : On;\n            ShadowReadEnable : On;\n        }\n        Tick {\n            ReadEnable : On;\n            ShadowReadEnable : On;\n        }\n    }\n    Operation (ReadModifyWrite) {\n        Tick {\n            StrobeDataOut;\n            ReadEnable : On;\n            ShadowReadEnable : On;\n        }\n        Tick {\n            WriteEnable : On;\n            ReadEnable : Off;\n            ShadowReadAddress : On;\n        }\n    }\n}<\/code><\/pre>\n\n\n\n
        PipelineDepth : int<\/em>; \/\/ default: 0<\/h3>\n\n\n\n
        \u5b9a\u4e49compare\u64cd\u4f5c\u7684pipeline\uff0c\u5f53memory\u5185\u7f6epipeline\u65f6\uff08read data\u9700\u8981\u591a\u62cd\u4f20\u51fa\uff09\uff0c\u9700\u8981\u6307\u5b9a\u8fd9\u4e2a\u53c2\u6570\u3002<\/p>\n\n\n\n
        \u8fd9\u4e2a\u53c2\u6570\u53ef\u4ee5\u5c06\u540c\u4e00\u79cdoperation set\u7528\u4e8e\u4e0d\u540cpipeline\u7684memory\u3002<\/p>\n\n\n\n
        \u5f53\u4f60\u7684operation set\u5982\u4e0b\uff1a<\/p>\n\n\n\n
        Operation (Read) {\n    Cycle {\n        read_enable: on;\n    }\n    Cycle {\n        read_enable: off;\n        strobe_data_out: on;\n    }\n}<\/code><\/pre>\n\n\n\n
        \u7b2c\u4e00\u4e2acycle\u8868\u793a\u8bfb\u53d6\u6570\u636e\uff0c\u7b2c\u4e8c\u4e2acycle\u4e2dstrobe_data_out\u8868\u793acompare\uff0c\u5982\u679c\u4e00\u4e2amemory\u5185\u7f6e\u4e86\u4e24\u62cd\u5ef6\u65f6\uff0c\u5219\u53ef\u4ee5\u6307\u5b9aPipelineDepth=2\uff0c\u4e0d\u9700\u8981\u6539\u52a8operation set\uff0ccontroller\u4f1a\u4ea7\u751f\u5bf9\u5e94\u7684\u5ef6\u65f6\u4e24\u62cd\u6ce2\u5f62\u3002<\/p>\n\n\n
        \n
        \"\"<\/div><\/figure>\n<\/div>\n\n\n
        ReadOutOfRangeOK : on | off<\/u><\/h3>\n\n\n\n
        \u544a\u77e5EDA\u5de5\u5177memory\u662f\u5426\u80fd\u591f\u5bb9\u5fcd\u8d85\u51fa\u5730\u5740\u8303\u56f4\u7684\u8bfb\u64cd\u4f5c\u3002\u5f53\u5f00\u542f\u4e86ShadowRead<\/code>\u65f6\uff0c\u8bfb\u64cd\u4f5c\u662f\u53ef\u80fd\u8d85\u51fa\u5730\u5740\u8303\u56f4\u7684\uff0cController\u4e2d\u9ed8\u8ba4\u9700\u8981\u68c0\u67e5\u5730\u5740\u8303\u56f4\u662f\u5426\u8d85\u51fa\u3002\u5982\u679c\u5c06ReadOutOfRangeOK<\/code> \u8bbe\u4e3aon\uff0c\u5219\u4e0d\u68c0\u67e5\u3002\u8d85\u51fa\u5730\u5740\u8303\u56f4\u7684read\u662f\u4e0d\u4f1a\u5f71\u54cdBIST\u7684\u7ed3\u679c\u7684\u3002\u4f46\u662f\uff0c\u5982\u679cmemory\u4f1a\u56e0\u4e3a\u8fd9\u4e2a\u64cd\u4f5c\u800c\u635f\u574f\u6570\u636e\uff0c\u5219\u5fc5\u987b\u8bbe\u4e3aoff\u3002<\/p>\n\n\n\n
        RetentionTimeMax : time | none<\/u><\/h3>\n\n\n\n
        RetentionTimeMax\u5c5e\u6027\u6307\u5b9aDRAM\u9635\u5217\u4e24\u6b21\u5b8c\u5168\u5237\u65b0\u4e4b\u95f4\u7684\u4fdd\u7559\u65f6\u95f4\u4e0a\u9650\u3002\u56e0\u6b64\uff0c\u5e94\u7528\u4e8eDRAM\u7684\u4e24\u4e2a\u8fde\u7eed\u5237\u65b0\u64cd\u4f5c\u4e4b\u95f4\u7684\u5b9e\u9645\u5237\u65b0\u95f4\u9694\u8ba1\u7b97\u4e3aRetentionTimeMax\u9664\u4ee5\u6700\u5927DRAM\u884c\u6570\uff0c\u9ed8\u8ba4\u503c\u662fnone\u3002<\/p>\n\n\n\n
        RomContentsFile : file_path_name<\/em><\/h3>\n\n\n\n
        \u6307\u5b9aROM\u4e2d\u7684\u4e8c\u8fdb\u5236\u5185\u5bb9\uff0cfile\u4e2d\u6bcf\u884c\u90fd\u662f\u4e00\u4e2aword\u7684\u6570\u636e\uff0c\u9996\u5730\u5740\u4e3a0\uff0c\u652f\u63012\u8fdb\u5236\u548c16\u8fdb\u5236\u4e24\u79cd\u683c\u5f0f\uff0c\u5728\u540c\u4e00\u4e2afile\u4e2d\uff0c\u4e24\u79cd\u683c\u5f0f\u4e0d\u80fd\u6df7\u7528\u3002<\/p>\n\n\n\n
        \u53ef\u4ee5\u4f7f\u7528DftSpecification\/MemoryBist\/Controller\/Step\/MemoryInterface wrapper<\/code>\u4e2d\u7684rom_content_file<\/code>\u8986\u76d6ROM content file name\u3002<\/p>\n\n\n\n
        ShadowRead : on | off | auto<\/u><\/h3>\n\n\n\n
        \u7528\u4e8e\u5f00\u542f\u6216\u5173\u95edshadow read cycle\u3002shadow read\u7528\u4e8e\u68c0\u6d4b\u591a\u4e2alogical port\u4e4b\u95f4\u7684\u77ed\u8def\uff0cMBIST controller\u4f1a\u5728\u8bfb\u5199active port\u7684\u540c\u62cd\uff0c\u5bf9inactive port\u8bfb\u3002shadow read\u4e0d\u652f\u6301\u5bf9\u4e0d\u540c\u5217\u8fdb\u884c\u8bfb\uff08\u6309\u4f4d\u8bfb\uff09\uff0c\u4f7f\u7528ConcurrentRead<\/code>\u66f4\u7075\u6d3b\u3002<\/p>\n\n\n\n
        \u8bbe\u4e3aon\u65f6\uff0cshadow read\u5c06\u4f1a\u5bf9row address counter\uff08word address\uff09\u7684bit0\u53d6\u53cd\uff0c\u5728inactive port\u8bfb\u8be5\u5730\u5740\u3002\u8bbe\u4e3aoff\u5219\u5173\u95edshadow read\u3002<\/p>\n\n\n\n
        \u5982\u679c\u8bbe\u4e3aauto\uff0cEDA\u5de5\u5177\u5728\u4ee5\u4e0b\u60c5\u51b5\u4e0b\u4f1a\u81ea\u52a8\u5173\u95edshadowread\uff1a<\/p>\n\n\n\n
          \n
        • \u5f53OperationSet\u5b57\u6bb5\u6ca1\u6709\u6307\u5b9aConcurrentPortSignals\/read_row_address<\/code> \u548cConcurrentPortSignals\/read_enable<\/code> waveforms\u65f6<\/li>\n\n\n\n
        • \u5982\u679c\u6ca1\u6709\u5728AddressCounter <\/code>wrapper\u4e2d\u6307\u5b9arow address<\/li>\n\n\n\n
        • \u5982\u679c\u4f7f\u7528\u9ed8\u8ba4\u7684address counter\u5e76\u4e14NumberOfWords\u7684\u503c\u662f\u5947\u6570<\/li>\n\n\n\n
        • \u5982\u679clowRange for Function(RowAddress)\/CountRange<\/code>\u662f\u5947\u6570\uff0c\u6216\u8005highRange for Function(RowAddress)\/CountRange<\/code>\u662f\u5076\u6570\uff08\u4f1a\u5bfc\u81f4read out of range\uff09\u5e76\u4e14ReadOutOfRangeOK<\/code>\u8bbe\u4e3a\u4e86off\u3002<\/li>\n\n\n\n
        • \u5982\u679c\u6307\u5b9aLogicalPorts<\/code>: 1RW or 1R<\/li>\n<\/ul>\n\n\n\n
          \n
          \u5982\u679cShadowWrite\u8bbe\u4e3a\u4e86on\uff0c\u5982\u679c\u6761\u4ef6\u6ee1\u8db3\uff0cShadowRead\u4f1a\u81ea\u52a8\u8bbe\u4e3aon\u3002
          \u5f53ConcurrentPortSignals\/read_enable<\/code> waveform\u4e3aon\u65f6\uff0caddress counter\u7981\u6b62\u7531\u4e8e\u884c\u5730\u5740\u53d6\u53cd\u9020\u6210\u7684out of range\u3002<\/p>\n<\/blockquote>\n\n\n\n
          ShadowWrite : on | off<\/u><\/h3>\n\n\n\n
          \u7528\u4e8e\u5f00\u542f\u6216\u5173\u95edShadowWrite<\/code>\u3002shadow write\u7528\u4e8e\u68c0\u6d4bport\u4e4b\u95f4\u5404\u4e2abitline\u7684\u8026\u5408\u6545\u969c\u3002MBIST controller\u4f1a\u5728SMarchCHKBci<\/code>\u3001SMarchCHKBcil<\/code>\u3001SMarchCHKBvcd<\/code>\u4e2d\u7279\u5b9a\u7684\u9636\u6bb5\u5728inactive ReadWrite ports\u4e0a\u8fdb\u884c\u5199\u64cd\u4f5c\u3002<\/p>\n\n\n\n
          \u5bf9\u4e8e\u6709\u4e00\u4e2aRead port\u548c\u4e24\u4e2aWrite port\u7684memory\uff0cSMarchCHKBci<\/code>\u3001SMarchCHKBcil<\/code>\u3001SMarchCHKBvcd<\/code>\u7b97\u6cd5\u652f\u6301\u5728READ\u548cWRITE\u9636\u6bb5\u5bf9inactive write port\u4e0a\u5199\u64cd\u4f5c\u3002<\/p>\n\n\n\n
          \u8bbe\u4e3aon\u65f6\uff0cshadow write\u4f1a\u5c06row address\u8bbe\u4e3a\u6700\u5927\u503c\uff08\u539f\u6587\uff1aforcing the row address to its full binary range\uff09\uff0c\u8fdb\u884c\u5199\u64cd\u4f5c\u3002<\/p>\n\n\n\n
          ShadowWriteOK : on | off<\/u><\/h3>\n\n\n\n
          \u6307\u5b9amemory\u5728shadow write\u65f6\u662f\u5426\u53ef\u4ee5\u5fcd\u53d7\u5730\u5740out of range\u3002\u5f53\u652f\u6301shadow write\u65f6\uff0cShadowWriteOK <\/code>\u5fc5\u987b\u8bbe\u4e3aon\u3002
          ShadoWrite <\/code>operation\u53ea\u652f\u6301library algorithms\uff0c\u5982\u679c\u9700\u8981custom operation sets\uff0c\u53ef\u4ee5\u4f7f\u7528ConcurrentWrite<\/code>\u3002<\/p>\n\n\n\n
          \n
          \u610f\u5473\u7740shadow write\u662f\u4e00\u5b9a\u4f1aout of range\u7684\uff1f<\/p>\n<\/blockquote>\n\n\n\n
          TransparentMode : syncmux<\/u> | none | asyncmux<\/h3>\n\n\n\n
          \u5b9a\u4e49memory\u5728scan\u6d4b\u8bd5\u4e2d\uff0c\u4f55\u65f6\u3001\u5982\u4f55bypass\u3002<\/p>\n\n\n\n
          \u9ed8\u8ba4\u503c\u662fsyncmux\u3002<\/p>\n\n\n\n
            \n
          • syncmux\uff1a\u5728memory output port\u4e0a\u63d2\u5165\u989d\u5916\u7684mux\u548c\u5bc4\u5b58\u5668<\/li>\n\n\n\n
          • none\uff1a\u4e0d\u5728interface\u4e2d\u52a0\u5165bypass\u903b\u8f91\uff0c\u5f53memory\u5185\u90e8\u81ea\u5e26bypass\u903b\u8f91\u65f6\uff0c\u9700\u8981\u8bbe\u4e3anone<\/li>\n\n\n\n
          • asyncmux\uff1a\u5728output port\u4e0a\u52a0mux\uff0c\u4e0d\u989d\u5916\u52a0\u5bc4\u5b58\u5668\uff0c\u8f93\u5165\u53ef\u4ee5\u76f4\u8fde\u5230\u8f93\u51fa\uff0c\u8fd9\u4e2a\u503c\u53ea\u6709\u5728DataOutStage<\/code>\u8bbe\u4e3anone\u65f6\u624d\u53ef\u4ee5\u88ab\u4f7f\u7528<\/li>\n<\/ul>\n\n\n\n
            \n
            Note\uff1a\u5982\u679cmemory\u5185\u90e8\u542b\u6709bypass\u7535\u8def\uff0c\u5728\u8fdb\u884cMBIST flow\u65f6\uff0c\u5fc5\u987b\u7981\u7528\u6389bypass\u903b\u8f91<\/p>\n<\/blockquote>\n\n\n\n
            <\/p>\n","protected":false},"excerpt":{"rendered":"
            \u2014\u2014\u5185\u5bb9\u53c2\u8003\u300aTessent\u2122 MemoryBIST User\u2019s Manual For Use With T […]<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[8],"tags":[5,6,7],"class_list":["post-59","post","type-post","status-publish","format-standard","hentry","category-dft","tag-dft","tag-mbist","tag-tcd"],"_links":{"self":[{"href":"https:\/\/zoneofee.cn\/index.php\/wp-json\/wp\/v2\/posts\/59","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/zoneofee.cn\/index.php\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/zoneofee.cn\/index.php\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/zoneofee.cn\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/zoneofee.cn\/index.php\/wp-json\/wp\/v2\/comments?post=59"}],"version-history":[{"count":5,"href":"https:\/\/zoneofee.cn\/index.php\/wp-json\/wp\/v2\/posts\/59\/revisions"}],"predecessor-version":[{"id":166,"href":"https:\/\/zoneofee.cn\/index.php\/wp-json\/wp\/v2\/posts\/59\/revisions\/166"}],"wp:attachment":[{"href":"https:\/\/zoneofee.cn\/index.php\/wp-json\/wp\/v2\/media?parent=59"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/zoneofee.cn\/index.php\/wp-json\/wp\/v2\/categories?post=59"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/zoneofee.cn\/index.php\/wp-json\/wp\/v2\/tags?post=59"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}